Expert Witness 49097
Semiconductors
California
Bachelor, Indiana Institute of Technology
Cases
Deposition Experience
Court Testimony Experience
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With more than 30 years of experience in engineering physics, this expert is widely recognized for work in semiconductor device physics, circuit design, and reliability engineering, with particular depth in electrostatic discharge (ESD) and latch-up phenomena. His technical background covers complementary metal-oxide-semiconductor (CMOS), bipolar, bipolar complementary metal-oxide-semiconductor (BiCMOS), silicon-on-insulator (SOI), laterally diffused metal-oxide-semiconductor (LDMOS), bipolar-CMOS-DMOS (BCD), and silicon-germanium technologies, along with hands-on involvement in chip architecture, layout, and electronic design automation. He has contributed directly to the development of dynamic random-access memory (DRAM), static random-access memory (SRAM), application-specific integrated circuits (ASICs), and microprocessor technologies, supporting both device-level innovation and large-scale semiconductor product programs.
A significant portion of his work centers on reliability and failure mechanisms in advanced semiconductor systems. His experience includes ESD protection design, latch-up prevention, leakage and radiation effects, and soft error rate analysis, along with the development of testing methodologies and design strategies for improving device robustness. He is a Fellow of the Institute of Electrical and Electronics Engineers (IEEE), recognized for pioneering contributions to ESD protection, and has authored numerous technical books and publications while holding more than 250 United States patents, reflecting a sustained impact on semiconductor technology and standards development.
In addition to research and product development, he has provided consulting and litigation support in semiconductor-related matters, including patent analysis and engineering evaluation. His work in these engagements draws on more than 30 years of experience across device design, circuit integration, and reliability engineering, supporting technical assessments in complex disputes involving integrated circuits and electronic systems.
His educational background includes a Doctor of Philosophy in Engineering Physics, a Master of Science in Engineering Physics, a Master of Science in Electrical Engineering, and a Bachelor of Science in Engineering Science.
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Degree Type
Doctorate
Field of Study
Philosophy
Institution
University of Vermont
Degree Type
Master
Field of Study
Engineering Physics
Institution
University of Vermont
Degree Type
Type
N/A
Certification / License
None
Issuing Authority
null
Tags:
Electrostatic Discharge (ESD)
Application specific integrated circuit
Electronic design automation
Semiconductor manufacturing
Semiconductor Test
Master
Field of Study
Electrical Engineering
Institution
Massachusetts Institute of Technology
Degree Type
Master
Field of Study
Electrical Engineering
Institution
Massachusetts Institute of Technology
Degree Type
Bachelor
Field of Study
Science in Engineering
Institution
University at Buffalo